/*******************************************************************
* Copyright (C) 1986-2022 Xilinx, Inc. All rights reserved.
* Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
* SPDX-License-Identifier: MIT
*******************************************************************************/

#ifndef SDT
#include "xparameters.h"
#endif
#include "xv_mix.h"

/*
* The configuration table for devices
*/

XV_mix_Config XV_mix_ConfigTable[] =
{
	{
		XPAR_V_MIX_0_DEVICE_ID,
		XPAR_V_MIX_0_S_AXI_CTRL_BASEADDR,
		XPAR_V_MIX_0_SAMPLES_PER_CLOCK,
		XPAR_V_MIX_0_MAX_COLS,
		XPAR_V_MIX_0_MAX_ROWS,
		XPAR_V_MIX_0_MAX_DATA_WIDTH,
		XPAR_V_MIX_0_VIDEO_FORMAT,
		XPAR_V_MIX_0_NR_LAYERS,
		XPAR_V_MIX_0_LOGO_LAYER,
		XPAR_V_MIX_0_MAX_LOGO_COLS,
		XPAR_V_MIX_0_MAX_LOGO_ROWS,
		XPAR_V_MIX_0_LOGO_TRANSPARENCY_COLOR,
		XPAR_V_MIX_0_LOGO_PIXEL_ALPHA,
		XPAR_V_MIX_0_ENABLE_CSC_COEFFICIENT_REGISTERS,
		{{
		XPAR_V_MIX_0_LAYER1_ALPHA,
		XPAR_V_MIX_0_LAYER2_ALPHA,
		XPAR_V_MIX_0_LAYER3_ALPHA,
		XPAR_V_MIX_0_LAYER4_ALPHA,
		XPAR_V_MIX_0_LAYER5_ALPHA,
		XPAR_V_MIX_0_LAYER6_ALPHA,
		XPAR_V_MIX_0_LAYER7_ALPHA,
		XPAR_V_MIX_0_LAYER8_ALPHA
		XPAR_V_MIX_0_LAYER9_ALPHA
		XPAR_V_MIX_0_LAYER10_ALPHA
		XPAR_V_MIX_0_LAYER11_ALPHA
		XPAR_V_MIX_0_LAYER12_ALPHA
		XPAR_V_MIX_0_LAYER13_ALPHA
		XPAR_V_MIX_0_LAYER14_ALPHA
		XPAR_V_MIX_0_LAYER15_ALPHA
		XPAR_V_MIX_0_LAYER16_ALPHA
		}},
		{{
		XPAR_V_MIX_0_LAYER1_UPSAMPLE,
		XPAR_V_MIX_0_LAYER2_UPSAMPLE,
		XPAR_V_MIX_0_LAYER3_UPSAMPLE,
		XPAR_V_MIX_0_LAYER4_UPSAMPLE,
		XPAR_V_MIX_0_LAYER5_UPSAMPLE,
		XPAR_V_MIX_0_LAYER6_UPSAMPLE,
		XPAR_V_MIX_0_LAYER7_UPSAMPLE,
		XPAR_V_MIX_0_LAYER8_UPSAMPLE
		XPAR_V_MIX_0_LAYER9_UPSAMPLE
		XPAR_V_MIX_0_LAYER10_UPSAMPLE
		XPAR_V_MIX_0_LAYER11_UPSAMPLE
		XPAR_V_MIX_0_LAYER12_UPSAMPLE
		XPAR_V_MIX_0_LAYER13_UPSAMPLE
		XPAR_V_MIX_0_LAYER14_UPSAMPLE
		XPAR_V_MIX_0_LAYER15_UPSAMPLE
		XPAR_V_MIX_0_LAYER16_UPSAMPLE
		}},
		{{
		XPAR_V_MIX_0_LAYER1_MAX_WIDTH,
		XPAR_V_MIX_0_LAYER2_MAX_WIDTH,
		XPAR_V_MIX_0_LAYER3_MAX_WIDTH,
		XPAR_V_MIX_0_LAYER4_MAX_WIDTH,
		XPAR_V_MIX_0_LAYER5_MAX_WIDTH,
		XPAR_V_MIX_0_LAYER6_MAX_WIDTH,
		XPAR_V_MIX_0_LAYER7_MAX_WIDTH,
		XPAR_V_MIX_0_LAYER8_MAX_WIDTH
		XPAR_V_MIX_0_LAYER9_MAX_WIDTH
		XPAR_V_MIX_0_LAYER10_MAX_WIDTH
		XPAR_V_MIX_0_LAYER11_MAX_WIDTH
		XPAR_V_MIX_0_LAYER12_MAX_WIDTH
		XPAR_V_MIX_0_LAYER13_MAX_WIDTH
		XPAR_V_MIX_0_LAYER14_MAX_WIDTH
		XPAR_V_MIX_0_LAYER15_MAX_WIDTH
		XPAR_V_MIX_0_LAYER16_MAX_WIDTH
		}},
		{{
		XPAR_V_MIX_0_LAYER1_INTF_TYPE,
		XPAR_V_MIX_0_LAYER2_INTF_TYPE,
		XPAR_V_MIX_0_LAYER3_INTF_TYPE,
		XPAR_V_MIX_0_LAYER4_INTF_TYPE,
		XPAR_V_MIX_0_LAYER5_INTF_TYPE,
		XPAR_V_MIX_0_LAYER6_INTF_TYPE,
		XPAR_V_MIX_0_LAYER7_INTF_TYPE,
		XPAR_V_MIX_0_LAYER8_INTF_TYPE
		XPAR_V_MIX_0_LAYER9_INTF_TYPE
		XPAR_V_MIX_0_LAYER10_INTF_TYPE
		XPAR_V_MIX_0_LAYER11_INTF_TYPE
		XPAR_V_MIX_0_LAYER12_INTF_TYPE
		XPAR_V_MIX_0_LAYER13_INTF_TYPE
		XPAR_V_MIX_0_LAYER14_INTF_TYPE
		XPAR_V_MIX_0_LAYER15_INTF_TYPE
		XPAR_V_MIX_0_LAYER16_INTF_TYPE
		}},
		{{
		XPAR_V_MIX_0_LAYER1_VIDEO_FORMAT,
		XPAR_V_MIX_0_LAYER2_VIDEO_FORMAT,
		XPAR_V_MIX_0_LAYER3_VIDEO_FORMAT,
		XPAR_V_MIX_0_LAYER4_VIDEO_FORMAT,
		XPAR_V_MIX_0_LAYER5_VIDEO_FORMAT,
		XPAR_V_MIX_0_LAYER6_VIDEO_FORMAT,
		XPAR_V_MIX_0_LAYER7_VIDEO_FORMAT,
		XPAR_V_MIX_0_LAYER8_VIDEO_FORMAT
		XPAR_V_MIX_0_LAYER9_VIDEO_FORMAT
		XPAR_V_MIX_0_LAYER10_VIDEO_FORMAT
		XPAR_V_MIX_0_LAYER11_VIDEO_FORMAT
		XPAR_V_MIX_0_LAYER12_VIDEO_FORMAT
		XPAR_V_MIX_0_LAYER13_VIDEO_FORMAT
		XPAR_V_MIX_0_LAYER14_VIDEO_FORMAT
		XPAR_V_MIX_0_LAYER15_VIDEO_FORMAT
		XPAR_V_MIX_0_LAYER16_VIDEO_FORMAT
		}}

	}
};
